cv
Basics
Name | Duhyeon Kim (김두현) |
Label | Electrical Engineering Student |
kdhluck@naver.com | |
Url | https://dudududukim.github.io/ |
Summary | Looking forward to the Path that fits for me, making the world embrace the full potential of AI and digital technology. |
Education
-
2019.03 - Present Seoul, South Korea
Skills
Programming | |
PyTorch | |
Python | |
C | |
Matlab | |
(System)Verilog |
Machine Learning | |
Computer Vision | |
Natural Language Processing | |
Generative Models |
Hardware | |
Digital Circuit Design | |
VLSI Design | |
RTL Simulation | |
Computer Architecture | |
FPGA Development | |
RISC-V |
EDA Tools | |
Xilinx Vivado | |
Intel Quartus | |
Synopsys Design Compiler | |
Icarus Verilog (iverilog) | |
GTKWave |
Languages
Korean | |
Native |
English | |
OPIc IH |
Projects
- 2024.03 - 2024.06
Advanced Machine Learning
Implemented generative models in PyTorch with optimized conditional generation techniques
- 2024.03 - 2024.06
Natural Language Processing
Built sentiment analysis system for lyrics with BERT fine-tuning and emotion-based recommendations
- 2024.03 - Present
HandS Smart Shared Refrigerator
Developed IoT refrigerator with RFID access, computer vision inventory tracking, and robotic automation
- 2024.09 - 2024.12
System Optimization
Enhanced matrix multiplication performance with loop-tiling, SIMD, and OpenMP parallelization
- 2024.03 - 2024.06
VLSI Design
Created optimized matrix multiplier hardware and area-efficient DCT circuits for JPEG compression
- 2024.09 - 2024.12
Computer Architecture
Implemented pipelined RISC-V processor with hazard detection and data forwarding mechanisms
- 2024.09 - 2024.12
Engineering Design II
Built matrix multiplication hardware using systolic arrays and vector multipliers on FPGAs